∿ LEARN DSPFrom signal to HF transceiver
Part roadmap

Architecture analysis of QMX/uSDX

Use schematics and code to explain how real transceivers work and compare them with your own model.

Goal

Use schematics and code to explain how real transceivers work and compare them with your own model.

Prerequisites: Parts 10–15 and project 17. Part 16 is useful but not mandatory.

Future lessons

  1. Record the specific board and firmware versions of each device.
  2. From primary sources, reconstruct the receive and transmit diagrams, sample rates, word lengths and the boundaries between analog and digital processing.
  3. Compare the modulation methods, the processor or FPGA load, and how the input and output conversion is implemented.
  4. For the selected version, check whether polar chains, a switching power amplifier, filtering and feedback apply.
  5. Compare the measurable limits with the Python model and with the requirements for your own device.

Lab plan

  • Make a source card: official document or repository, version, date, page or line of code.
  • Move one confirmed architectural technique to Python and measure its advantages and limits.
  • Compare QMX, uSDX and your own project; mark unknown parameters explicitly.

We do the experiments in Python with NumPy, SciPy and Matplotlib. We keep the parameters, units and plots. The base models use float64 and complex128; we add bit-depth limits in separate experiments.

Completion criteria

  • I can separate confirmed information from assumptions, and I do not mix device versions.
  • I can explain the choice of sample rates, word lengths, filters and transmit method; I evaluate an alternative.

Result for the main project

A review with sources and the requirements for my own HF design.