∿ LEARN DSPFrom signal to HF transceiver
Part roadmap

Fixed-point arithmetic

Select the word lengths and scaling from the measured error.

Goal

Select the word lengths and scaling from the measured error.

Prerequisites: Parts 01–13 and working floating-point models.

Future lessons

  1. Signed integers, two’s complement and the Q format convention.
  2. Q1.15: 16 bits in total, including the sign, of which 15 are fractional; the range is from −1 to 1−2⁻¹⁵.
  3. Multiplication, bit growth, accumulator width, shifts and scaling.
  4. Overflow with wraparound (wrap) or with saturation; truncation, rounding, coefficient quantization and IIR limit cycles.
  5. A comparison of float64/complex128, float32/complex64 and models with word lengths of 24/16/12/8 bits.

Lab plan

  • Write rounding, saturation and overflow with an explicit word length; avoid implicit NumPy overflow.
  • Convert the FIR, NCO and mixer to an integer model; measure the SNR, the spurious components and the accumulator headroom.
  • Do the scenarios again with strong interference, a weak signal, envelope peaks and IIR feedback.

We do the experiments in Python with NumPy, SciPy and Matplotlib. We keep the parameters, units and plots. The base models use float64 and complex128; we add bit-depth limits in separate experiments.

Completion criteria

  • For each node, I state the sign, scale, word length and rounding.
  • I can tell the difference between bit-exact arithmetic and an approximate simulation of quantization with float.

Result for the main project

A table of word lengths and a reference integer model of the selected blocks.